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Integrated circuit testing is vital to the functionality of most electronic devices. Microchips, as integrated circuits are also known, can be found in computers, cell phones, automobiles, and virtually anything that contains electronic components. Without testing both prior to final installation and once installed onto a circuit board, many devices would arrive non-functional or cease functioning earlier than their expected life spans. There are two main categories of integrated circuit testing, wafer testing and board level testing. In addition, the tests may be structural based or functional based.
Wafer testing, or wafer probing, is performed at the production level, prior to the chip's installation in its final destination. This test is done using automated testing equipment (ATE) on the complete silicon wafer from which the square die of the chips will be cut. Prior to packaging, final testing is done at board level, utilizing the same or similar ATE as the wafer testing.
Automated test pattern generation, or automated test pattern generator (ATPG), is the methodology used to assist the ATE in determining defects or faults in integrated circuit testing. A number of ATPG processes are currently in use, including stuck-at-fault, sequential, and algorithmic methods. These structural methods have replaced the functional testing in many applications. Algorithmic methods were primarily developed to handle the more complex integrated circuit testing for very-large-scale integrated (VLSI) circuits.
Many electronic circuits are manufactured to include built-in self-repair (BISR) functionality as a part of the design for test (DFT) technique, which allows for faster and less expensive integrated circuit testing. Dependent upon factors such as implementation and purpose, specialized variations and versions of BIST are available. A few examples are programmable built-in self-test (PBIST), continuous built-in self-test (CBIST), and power-up built-in self-test (PupBIST).
When performing integrated circuit testing on boards, one of the most common methods is the board-level functional test. This test is a simple method of determining the basic functionality of the circuit, and additional testing is generally implemented. Some other on-board tests are the boundary scan test, the vector less test, and the vector-based back-drive test.
The boundary scan is typically performed using the Institute of Electrical and Electronics Engineers (IEEE) standard 1149.1, commonly referred to as Joint Test Action Group (JTAG). Automated integrated circuit testing is under development as of 2011. Two primary methods, automated optical inspection (AOI) and automated X-ray inspection (AXI), are the forerunners of this solution for detecting faults early in production. Integrated circuit testing will continue to evolve as electronic technologies become more complex and microchip manufacturers desire more efficient and cost-effective solutions.
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